1. Field of the Invention
The present invention pertains to circuits for connecting electronic devices, especially to circuits and systems for expandably connecting electronic devices.
2. Background of the Invention
Today, electronic systems such as computer systems are used by more and more people at their place of work or in their home. In such electronic systems, various integrated circuits (ICs) or chips are connected to a computer Central Processing Unit (CPU) via a computer bus. The integrated circuits or chips may be input/output processors, function generators, memories, or sensors for detecting physical and/or chemical changes. Each chip is assigned a unique bus address, which can distinguish the chip from other chips.
In particular, the above-mentioned chips generally have some address pins, which can be manually set to have high or low input voltage levels. In this way, a unique address can be assigned to each chip connected to the computer bus.
FIG. 2 shows a structure of a commonly used system 200 for expandably connecting electronic devices. Plural chips 220, 230, 240 and 250 are connected in parallel to a computer bus, and in turn are collectively connected to a control chip 210. The logic high input voltage corresponds to the logic 1 state, and the logic low input voltage corresponds to the logic 0 state. In order to assign each chip a unique address, three address pins A0, A1 and A2 of the chip 220 are set as low voltage level. Therefore, the address of the chip 220 is “000.” An address pin A0 of the chip 230 is set as high voltage level, and the remaining address pins A1 and A2 are set as low voltage level. Therefore, the address of the chip 230 is “100.” The address pins A0 and A2 of the chip 240 are set as low voltage level, and the address pin A1 is set as high voltage level. Therefore, the address of the chip 240 is “010.” The address pins A0 and A1 of the chip 250 are set as high voltage level, and the remaining address pin A2 is set as low voltage level. Therefore, the address of the chip 250 is “110.”
The system 200 avoids disparate configurations of bus addresses being created for all the chips 220, 230, 240 and 250 connected to the computer bus. However, the system 200 requires that the bus addresses be preset during the manufacturing of the associated printed circuit board (PCB). Therefore when a new chip is required to be added to the same computer system, a new PCB containing the new chip must be manufactured. This limitation adds to costs and takes up considerable time. Thus, a circuit and system that overcome the aforementioned disadvantages are desired.